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Profile for mrengstad
Shared projects
CPLD Test Board XC2C2A v0.2
by
mrengstad.
4
layer board of
0.51x1.11
inches
(12.85x28.09
mm).
Shared on
June 8th, 2016 06:39.
New version of Xilinx XC2C2A-QFG32 CPLD, fixing the LDO pinout problem
CPLD
by
mrengstad.
2
layer board of
0.70x2.00
inches
(17.88x50.90
mm).
Shared on
May 3rd, 2016 21:31.
A simple breakout for the Xilinx XC9572 CPLD
The only additional component is the 3.3V LDO regulator. If you already have 3.3V available, a pin is available to bypass it. Inputs and outputs are 3.3V if you insert a jumper; otherwise, the outputs are powered from the VCCIO pin. While the IO is 5V tolerant, the VCCIO must be less than 3.3V, for instance, 2.5V or 1.8V.
The breakout tested fine, and it works like a charm.
BetsyBoard V0.5 - STM32L4 breakout
by
mrengstad.
4
layer board of
0.80x1.70
inches
(20.42x43.28
mm).
Shared on
February 5th, 2016 19:55.
A small STM32L4xx breakout/dev board.
This version adds dip-switch for boot-mode and battery connection. It also goes back to using non-BGA power regulator.
BetsyBoard V0.4 - STM32L4 breakout
by
mrengstad.
4
layer board of
0.80x1.70
inches
(20.42x43.28
mm).
Shared on
December 22nd, 2015 05:17.
A tiny board for STM32L4xx.
Untested.
PowerRail v0.2 - TPS65530 power board
by
mrengstad.
4
layer board of
1.71x1.71
inches
(43.33x43.33
mm).
Shared on
December 1st, 2015 19:16.
Untested